Settings-Diff
Vergleiche zwei BIOS-Dumps und finde geänderte Default-Werte.
Identisch
0
Geändert
74
unterschiedliche Defaults
Nur in A
16
Nur in B
17
Setting
VarStore : Offset
Wert A
Wert B
Kategorie
Δ
Row Precharge Time (tRP)[1;37;m%d[;;m
Setup:0x1B5
—
—
changed
Δ
RAS# Active Time (tRAS)[1;37;m%d[;;m
Setup:0x1B7
—
—
changed
Δ
RAS# Cycle Time (tRC)[1;37;m%d[;;m
Setup:0x1B9
—
—
changed
Δ
Write Recovery Time (tWR)[1;37;m%d[;;m
Setup:0x1BB
—
—
changed
Δ
Refresh Interval (tREFI)[1;37;m%d[;;m
Setup:0x1BD
—
—
changed
Δ
Refresh Cycle Time (tRFC1)[1;37;m%d[;;m
Setup:0x1BF
—
—
changed
Δ
Refresh Cycle Time (tRFC2)[1;37;m%d[;;m
Setup:0x1C1
—
—
changed
Δ
Refresh Cycle Time (tRFCSb)[1;37;m%d[;;m
Setup:0x1C3
—
—
changed
Δ
Read to Precharge (tRTP)[1;37;m%d[;;m
Setup:0x1C5
—
—
changed
Δ
RAS to RAS Delay (tRRD_L)[1;37;m%d[;;m
Setup:0x1C7
—
—
changed
Δ
RAS to RAS Delay (tRRD_S)[1;37;m%d[;;m
Setup:0x1C9
—
—
changed
Δ
Four Activate Window (tFAW)[1;37;m%d[;;m
Setup:0x1CB
—
—
changed
Δ
Write to Read Delay (tWTR_L)[1;37;m%d[;;m
Setup:0x1CD
—
—
changed
Δ
Write to Read Delay (tWTR_S)[1;37;m%d[;;m
Setup:0x1CF
—
—
changed
Δ
TrdrdScL[1;37;m%d[;;m
Setup:0x1D1
—
—
changed
Δ
TrdrdSc[1;37;m%d[;;m
Setup:0x1D3
—
—
changed
Δ
TrdrdSd[1;37;m%d[;;m
Setup:0x1D5
—
—
changed
Δ
TrdrdDd[1;37;m%d[;;m
Setup:0x1D7
—
—
changed
Δ
TwrwrScL[1;37;m%d[;;m
Setup:0x1D9
—
—
changed
Δ
TwrwrSc[1;37;m%d[;;m
Setup:0x1DB
—
—
changed
Δ
TwrwrSd[1;37;m%d[;;m
Setup:0x1DD
—
—
changed
Δ
{a1 #TwrwrDd{p200 #[1;37;m%d[;;m
Setup:0x1DF
—
—
changed
Δ
Twrrd[1;37;m%d[;;m
Setup:0x1E1
—
—
changed
Δ
Trdwr[1;37;m%d[;;m
Setup:0x1E3
—
—
changed
Δ
DFE Read Training
Setup:0x1E5
—
—
changed
Δ
Processor CA drive strengths[1;37;m%s[;;m
Setup:0x1E7
—
—
changed
Δ
Processor DQ drive strengths[1;37;m%s[;;m
Setup:0x1E8
—
—
changed
Δ
Processor ODT impedance[1;37;m%s[;;m
Setup:0x1E9
—
—
changed
Δ
Processor CS ODT impedance[1;37;m%s[;;m
Setup:0x1EA
—
—
changed hidden
Δ
Processor CA ODT impedance[1;37;m%s[;;m
Setup:0x1EB
—
—
changed hidden
Δ
Processor CK ODT impedance[1;37;m%s[;;m
Setup:0x1EC
—
—
changed hidden
Δ
Processor DQ ODT impedance[1;37;m%s[;;m
Setup:0x1ED
—
—
changed hidden
Δ
Processor DQS ODT impedance[1;37;m%s[;;m
Setup:0x1EE
—
—
changed hidden
Δ
Dram DQ drive strengths[1;37;m%s[;;m
Setup:0x1EF
—
—
changed hidden
Δ
Dram ODT impedance RTT_NOM_WR[1;37;m%s[;;m
Setup:0x1F0
—
—
changed hidden
Δ
Dram ODT impedance RTT_NOM_RD[1;37;m%s[;;m
Setup:0x1F1
—
—
changed
Δ
Dram ODT impedance RTT_WR[1;37;m%s[;;m
Setup:0x1F2
—
—
changed
Δ
Dram ODT impedance RTT_PARK[1;37;m%s[;;m
Setup:0x1F3
—
—
changed
Δ
Dram ODT impedance DQS_RTT_PARK[1;37;m%s[;;m
Setup:0x1F4
—
—
changed
Δ
SoC/Uncore OC Mode
Setup:0x1F5
—
—
changed
Δ
{w1300#VDDG CCD Voltage
Setup:0x1F6
—
—
changed
Δ
{w1300#VDDG IOD Voltage
Setup:0x1F8
—
—
changed hidden
Δ
{w1300#VDDP Voltage
Setup:0x1FA
—
—
changed hidden
Δ
{w1300#VDD Misc Voltage
Setup:0x1FC
—
—
changed hidden
Δ
{w1430#VDDIO Voltage (VDDIO_MEM_S3)[1;37;m%d.%03dV[;;m
Setup:0x1FE
—
—
changed hidden
Δ
{w1430# DRAM VDD Voltage
Setup:0x200
—
—
changed hidden
Δ
{w1430# DRAM VDDQ Voltage
Setup:0x202
—
—
changed hidden
Δ
{w1901# DRAM VPP Voltage
Setup:0x204
—
—
changed hidden
Δ
Infinity Fabric Frequency
Setup:0x206
—
—
changed hidden
Δ
UCLK DIV1 MODE
Setup:0x208
—
—
changed hidden
Δ
DRAM Performance Mode
Setup:0x21B
—
—
changed
Δ
Memory Slot Selection
Setup:0x21C
—
—
changed hidden
Δ
Password Check
Setup:0x21E
—
—
changed hidden
Δ
Onboard HD Audio
Setup:0x220
—
—
changed hidden
Δ
SATA Mode
Setup:0x221
—
—
changed hidden
Δ
SATA Port 1 Hot Plug
Setup:0x223
—
—
changed hidden
Δ
SATA Port 3 Hot Plug
Setup:0x225
—
—
changed hidden
Δ
SATA Port 4 Hot Plug
Setup:0x226
—
—
changed hidden
Δ
SATA Port 5 Hot Plug
Setup:0x227
—
—
changed hidden
Δ
SATA Port 6 Hot Plug
Setup:0x228
—
—
changed hidden
Δ
Onboard Button LED
Setup:0x23C
—
—
changed hidden
Δ
Mouse Relative Movement Delta
Setup:0x23E
—
—
changed hidden
Δ
Blue
Setup:0x245
—
—
changed hidden
Δ
PCIe Gen5 redriver
Setup:0x247
—
—
changed hidden
Δ
Downstream High Frequency Peak Port B
Setup:0x249
—
—
changed
Δ
Downstream Low Frequency Peak Port A
Setup:0x24A
—
—
changed hidden
Δ
Downstream Low Frequency Peak Port B
Setup:0x24B
—
—
changed hidden
Δ
Upstream High Frequency Peak Port A
Setup:0x24C
—
—
changed hidden
Δ
Upstream High Frequency Peak Port B
Setup:0x24D
—
—
changed hidden
Δ
Upstream Low Frequency Peak Port A
Setup:0x24E
—
—
changed hidden
Δ
Upstream Low Frequency Peak Port B
Setup:0x24F
—
—
changed hidden
Δ
Driver Swing
Setup:0x250
—
—
changed hidden
Δ
Flat Gain
Setup:0x251
—
—
changed hidden